1. Field of the Invention
This invention relates to an off-gate circuit for a gate-turn-off thyristor (hereinafter simply referred to as an off-gate circuit for a GTO thyristor, and more particularly to an off-gate circuit for a GTO thyristor having a control device for reducing turn-off loss.
2. Description of Background
Hitherto, a circuit such as that shown in FIG. 4 has been used as an off-gate circuit with a pulse transformer.
In FIG. 4, a GTO thyristor 1 has a gate connected to one end of a secondary winding N.sub.3 of a pulse transformer 2, and a cathode connected through diodes 7a and 7b to the other end of the secondary winding N.sub.3. A gate power source 3 is connected through a diode 6 to one end of a primary winding N.sub.1 of the pulse transformer 2 so as to supply gate power. The other end of the primary winding N.sub.1 is connected to one end of a primary winding N.sub.2 and also to one end of a capacitor 4. The other end of the primary winding N.sub.2 is connected through a transistor 5 to the other end of the capacitor 4 and also to the negative side of the gate power source 3.
FIG. 5(a), waveforms (I) through (III), illustrate respective waveforms in the operation of the circuit shown in FIG. 4. FIG. 5(a) waveform (I) represents a voltage waveform V.sub.C across the capacitor 4, FIG. 5(a) (II), an off-gate current I.sub.OFF produced from the secondary winding N.sub.3 of the pulse transformer 2, and FIG. 5(a), waveform (III), a voltage waveform V.sub.G-K between the gate and cathode of the GTO thyristor 1.
At a time to, the capacitor 4 is charged with a polarity V.sub.CO. The transistor 5, as shown in FIG. 4, is turned on when a base signal is fed into the transistor 5. The charge on the capacitor 4 then is discharged through the primary winding N.sub.2 of the pulse transformer 2 and the transistor 5 so as to induce a voltage within the secondary winding N.sub.3.
The output current I.sub.OFF from the secondary winding N.sub.3 is produced as a negative current between the cathode and the gate of the GTO thyristor 1. Diodes 7a and 7b prevent penetration of the on-gate current of an on-gate current circuit (not shown). During the period T.sub.OFF from the time t.sub.0 to a time t.sub.1, the base signal is fed into the transistor 5, which remains turned on. After the period T.sub.OFF, the transistor 5 is turned off (at the time t.sub.1), and an exciting current of the pulse transformer 2 flows through a path of the positive side of the gate power source 3, the diode 6, the primary winding N.sub.1 of the pulse transformer 2, the capacitor 4, and the negative side of the gate power source 3, whereby the capacitor 4 is recharged. An equilvalent circuit in this state is shown in FIG. 5(b).
In recent years there has been a need for a power converter apparatus employing larger-capacity GTO thyristors which have a higher switching frequency for pulse width modulation (PWM) control or the like.
In this case, successful reduction of switching loss within the GTO thyristors can raise the frequency limit which is caused by thermal restrictions.